import pytest
from amaranth import *
from amaranth.sim import Passive, Simulator

from itertools import product


class Empty(Elaboratable):
    def __init__(self):
        self.foo = Signal()

    def elaborate(self, platform):
        m = Module()
        cd_sync = ClockDomain()
        m.domains += cd_sync

        ###

        return m


@pytest.mark.parametrize("iters,mk_sig", product(range(4), (False, True)))
def test_shift_in(iters, mk_sig):
    sim = Simulator(Empty())

    if mk_sig:
        set = Signal()
    else:
        set = False

    foo = Signal()

    def take_proc():
        if not mk_sig:
            nonlocal set

        yield Passive()
        while True:
            if (mk_sig and (yield set)) or (not mk_sig and set):  # noqa: E501
                yield foo.eq(1)
            else:
                yield foo.eq(0)
            yield

    def in_proc():
        if not mk_sig:
            nonlocal set
            set = True
        else:
            yield set.eq(1)
        yield

        # Set is 1, it'll be propagated to foo at the end of this cycle.
        # But sometimes foo is already 1 when mk_sig is False!
        assert (yield foo == 0)

    sim.add_clock(1.0 / 12e6)
    sim.add_sync_process(in_proc)
    sim.add_sync_process(take_proc)
    sim.run()