Table 16. Port P1 (P1.0 to P1.2) Pin Functions
PIN NAME
(P1.x)		 x FUNCTION CONTROL BITS AND SIGNALS(1)
P1DIR.x P1SEL.x P1SEL2.x ADC10AE.x
INCH.x=1(2)		 CAPD.y

P1.0/

TA0CLK/

ACLK/

A0(2)/

CA0/

Pin Osc

 0 P1.x (I/O) I: 0; O: 1 0 0 0 0
TA0.TACLK 0 1 0 0 0
ACLK 1 1 0 0 0
A0 X X X 1 (y = 0) 0
CA0 X X X 0 1 (y = 0)
Capacitive sensing X 0 1 0 0

P1.1/

TA0.0/

UCA0RXD/

UCA0SOMI/

A1(2)/

CA1/

Pin Osc

 1 P1.x (I/O) I: 0; O: 1 0 0 0 0
TA0.0 1 1 0 0 0
TA0.CCI0A 0 1 0 0 0
UCA0RXD from USCI 1 1 0 0
UCA0SOMI from USCI 1 1 0 0
A1 X X X 1 (y = 1) 0
CA1 X X X 0 1 (y = 1)
Capacitive sensing X 0 1 0 0

P1.2/

TA0.1/

UCA0TXD/

UCA0SIMO/

A2(2)/

CA2/

Pin Osc

 2 P1.x (I/O) I: 0; O: 1 0 0 0 0
TA0.1 1 1 0 0 0
TA0.CCI1A 0 1 0 0 0
UCA0TXD from USCI 1 1 0 0
UCA0SIMO from USCI 1 1 0 0
A2 X X X 1 (y = 2) 0
CA2 X X X 0 1 (y = 2)
Capacitive sensing X 0 1 0 0

(1) X = don't care
(2) MSP430G2x53 devices only

Table 17. Port P1 (P1.3) Pin Functions
PIN NAME
(P1.x)		 x FUNCTION CONTROL BITS AND SIGNALS(1)
P1DIR.x P1SEL.x P1SEL2.x ADC10AE.x
INCH.x=1(2)		 CAPD.y

P1.3/

ADC10CLK(2)/

CAOUT/

A3(2)/

VREF-(2)/

VEREF-(2)/

CA3/

Pin Osc

 3 P1.x (I/O) I: 0; O: 1 0 0 0 0
ADC10CLK 1 1 0 0 0
CAOUT 1 1 1 0 0
A3 X X X 1 (y = 3) 0
VREF- X X X 1 0
VEREF- X X X 1 0
CA3 X X X 0 1 (y = 3)
Capacitive sensing X 0 1 0 0

(1) X = don't care
(2) MSP430G2x53 devices only